TY  - JOUR
AU  - Zhang, Jianfeng
AU  - Liu, Hengzhu
AU  - Chen, Ting
AU  - liu, dongpei
AU  - Zhang, Botao
PY  - 2013/03/28
Y2  - 2025/01/02
TI  - Enhanced Hardware Efficient FFT Processor Based On Adaptive Recoding CORDIC
JF  - Elektronika ir Elektrotechnika
JA  - ELEKTRON ELEKTROTECH
VL  - 19
IS  - 4
SE  - 
DO  - 10.5755/j01.eee.19.4.1422
UR  - https://eejournal.ktu.lt/index.php/elt/article/view/1422
SP  - 97-103
AB  - In this paper, we propose an enhanced hardware efficient CORDIC-based FFT processor. As the conventional CORDIC is restricted by the data precision and the times of iterations, Adaptive Recoding CORDIC (ARC) is adopted in our design, the bit error precision (BEP) of which is improved to 14&lt;sup&gt;th&lt;/sup&gt;. Simultaneously, Conflict-free parallel memory access scheme and Rom-free twiddle factor generation scheme are both introduced to improve the performance and reduce the memories to store the twiddle factors. Compared with some latest published FFT processors, synthesized results show the proposed FFT processor reduce the hardware overhead while improving the Signal-to-Noise Ratio (SNR). When the operating frequency is 250MHz, the proposed FFT processor performs radix-4 1024-point FFT every 5.4us.&lt;p&gt;DOI: &lt;a href=&quot;http://dx.doi.org/10.5755/j01.eee.19.4.1422&quot;&gt;http://dx.doi.org/10.5755/j01.eee.19.4.1422&lt;/a&gt;&lt;/p&gt;
ER  -