TY  - JOUR
AU  - Damasevicius, R.
AU  - Toldinas, J.
AU  - Grigaravicius, G.
PY  - 2013/06/10
Y2  - 2025/01/02
TI  - Modelling Battery Behaviour Using Chipset Energy Benchmarking
JF  - Elektronika ir Elektrotechnika
JA  - ELEKTRON ELEKTROTECH
VL  - 19
IS  - 6
SE  - 
DO  - 10.5755/j01.eee.19.6.4577
UR  - https://eejournal.ktu.lt/index.php/elt/article/view/4577
SP  - 117-120
AB  - Despite advances in low power system design, short battery life remains a significant user concern. Effective management of energy resources available on a mobile device requires understanding of the principles of battery behaviour. We propose a time-delay model of a battery, which depends upon three non-linear processes: rate-capacity effect, recovery effect and software scheduling effect. We provide an analysis of the power consumption results using 3DMark’06 chipset benchmarks and demonstrate that a moderate-to-strong correlation between power consumption vs. CPU load, memory allocation and memory release is observed. Finally, we apply our model for chipset energy efficiency profiling and propose a power benchmark metric.<p>DOI: <a href="http://dx.doi.org/10.5755/j01.eee.19.6.4577">http://dx.doi.org/10.5755/j01.eee.19.6.4577</a></p>
ER  -